SPC700

The SPC700 is the CPU portion of the S-SMP processor used to run the sound and music of the SNES. It is an 8-bit CPU with capabilities similar to the 6502.

Memory Layout
TODO

Registers
TODO

DSP Registers
A DSP register can be selected with $F2, after which it can be read or written at $F3. Often it is useful to load the register address into A, and the value to send in Y, so that MOV $F2, YA can be used to do both in one 16-bit instruction.

Voices
There are 8 voices, numbered 0 to 7. Each voice X has 10 registers in the range $X0-$X9.

P
Sample pitch is a 14-bit value controlling the rate the BRR sound sample will be played back.

Rate: P x 32,000 Hz / $1000

A pitch of $1000 will play back the sample at the SNES native samplerate of 32,000 Hz.

The pitch can go as high as $3FFF, almost two octaves above $1000. Pitches above $1000 will be subject to some aliasing from samples that are skipped over.

The pitch can go all the way down to 0, where it is halted. Pitches below $1000 will be lacking in higher frequencies, and there is not very much precision as the pitch value approaches 0.

SCRN
This points to an entry in the sample source directory (DIR). Changing this will not immediately change the voice's sample without a key on (KON), but if a looping sample is playing it can be used to change the loop point without a key on.

ADSR
This controls an Attack-Decay-Sustain-Release envelope that automatically adjusts the sample's envelope volume (ENVX) over time.


 * E: 1 to enable ADSR envelope, otherwise 0 uses GAIN instead.
 * A: Attack speed. $F for instant.
 * D: Decay speed, time to decay from full volume to the sustain level after the initial attack.
 * L: Sustain level.
 * R: Sustain release, speed of decay to 0 after note off.

GAIN
This register has 5 modes:


 * 0VVV VVVV sets ENVX directly.
 * 110V VVVV Linear slide up to 100% volume with rate V.
 * 111V VVVV Bent-line (fast to 75%, then slower to 100%) slide up with rate V.
 * 100V VVVV Linear slide down to 0% volume with rate V.
 * 101V VVVV Exponential slide down to 0% volume with rate V.

Global
Other DSP registers apply globally, rather than to a specific voice.

KON
This immediately starts the sample from its beginning, as designated by SCRN. If ADSR is enabled, its envelope will also start from the beginning.

FLG

 * R: soft reset prevents KON and mutes all voices.
 * M: mutes all voices.
 * E: set to 1 to disable echo, if 0 the echo unit will actively overwrite memory in the echo region (ESA). Do not write 0 to this bit unless ESA/EDL have been prepared.
 * N: sets the noise generator frequency.

ENDX
Each bit will read as set once a voice has finished playing a BRR sample block with the Source End flag set. Writing any value to this register will reset all the bits to 0, otherwise they remain set until the voice receives a new note on (KON).

Instruction Set
Official instruction names and syntax for SPC-700 instruction were provided by Sony. However, because of its architectural similarity to 6502, some prefer to rename and remap them using a 6502 style syntax. Both are provided here.

IPL Boot ROM
TODO

BRR Samples
TODO (See Links section below.)

Links

 * SPC 700 Documentation - Article by Gau.
 * SPC700 Reference - Superfamicom.org wiki article.
 * Bit Rate Reduction - Superfamicom.org wiki article, documents BRR sample format.
 * SNES APU DSP BRR Samples - Fullsnes documentation of BRR sample format.