MMIO register table/MMIO: Difference between revisions

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(importing table contents from MMIO registers)
 
(MEMSEL fastrom is backwards?)
 
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<noinclude>
<noinclude>
See: [[MMIO register table]]
{| class="wikitable"
{| class="wikitable"
! Name
! Name
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| style="text-align: right" | <tt style="white-space: nowrap">DDDD DDDD</tt>
| style="text-align: right" | <tt style="white-space: nowrap">DDDD DDDD</tt>
| RW8
| RW8
| Data to/from S-WRAM. Increments WMADD.
| Data to/from S-WRAM, increments WMADD.
|-
|-
! [[MMIO registers#WMADD|WMADDL]]<br/>[[MMIO registers#WMADD|WMADDM]]<br/>[[MMIO registers#WMADD|WMADDH]]
! [[MMIO registers#WMADD|WMADDL]]<br/>[[MMIO registers#WMADD|WMADDM]]<br/>[[MMIO registers#WMADD|WMADDH]]
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| style="text-align: right" | <tt style="white-space: nowrap">.... ...D</tt>
| style="text-align: right" | <tt style="white-space: nowrap">.... ...D</tt>
| W8
| W8
| Output to joypads. Latches standard controllers.
| Output to joypads (latches standard controllers).
|-
|-
! [[MMIO registers#JOYSER0|JOYSER0]]
! [[MMIO registers#JOYSER0|JOYSER0]]
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| style="text-align: right" | <tt style="white-space: nowrap">...1 11DD</tt>
| style="text-align: right" | <tt style="white-space: nowrap">...1 11DD</tt>
| R8
| R8
| Always 1 (1), Input from joypad 2 (D).
| Always 1 (1), input from joypad 2 (D).
|-
|-
! [[MMIO registers#NMITIMEN|NMITIMEN]]
! [[MMIO registers#NMITIMEN|NMITIMEN]]
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| style="text-align: right" | <tt style="white-space: nowrap">N.VH ...J</tt>
| style="text-align: right" | <tt style="white-space: nowrap">N.VH ...J</tt>
| W8
| W8
| Vblank NMI enable (N), Timer IRQ mode (VH), Joypad auto-read enable (J).
| Vblank NMI enable (N), timer IRQ mode (VH), joypad auto-read enable (J).
|-
|-
! [[MMIO registers#WRIO|WRIO]]
! [[MMIO registers#WRIO|WRIO]]
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| style="text-align: right" | <tt style="white-space: nowrap">21DD DDDD</tt>
| style="text-align: right" | <tt style="white-space: nowrap">21DD DDDD</tt>
| W8
| W8
| Joypad port 2 I/O (2), Joypad port 1 I/O (1), Unused I/O (D).
| Joypad port 2 I/O (2), joypad port 1 I/O (1), unused I/O (D).
|-
|-
! [[MMIO registers#WRMPY|WRMPYA]]
! [[MMIO registers#WRMPYA|WRMPYA]]
! $4202
! $4202
| style="text-align: right" | <tt style="white-space: nowrap">DDDD DDDD</tt>
| style="text-align: right" | <tt style="white-space: nowrap">DDDD DDDD</tt>
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| Unsigned multiplication factor A.
| Unsigned multiplication factor A.
|-
|-
! [[MMIO registers#WRMPY|WRMPYB]]
! [[MMIO registers#WRMPYB|WRMPYB]]
! $4203
! $4203
| style="text-align: right" | <tt style="white-space: nowrap">DDDD DDDD</tt>
| style="text-align: right" | <tt style="white-space: nowrap">DDDD DDDD</tt>
| W8
| W8
| Unsigned multiplication factor B. Starts 8-cycle multiplication.
| Unsigned multiplication factor B, starts 8-cycle multiplication.
|-
|-
! [[MMIO registers#WRDIV|WRDIVL]]<br/>[[MMIO registers#WRDIV|WRDIVH]]
! [[MMIO registers#WRDIV|WRDIVL]]<br/>[[MMIO registers#WRDIV|WRDIVH]]
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| style="text-align: right" | <tt style="white-space: nowrap">DDDD DDDD</tt>
| style="text-align: right" | <tt style="white-space: nowrap">DDDD DDDD</tt>
| W8
| W8
| Unsigned divisor. Starts 16-cycle division.
| Unsigned divisor, starts 16-cycle division.
|-
|-
! [[MMIO registers#HTIME|HTIMEL]]<br/>[[MMIO registers#HTIME|HTIMEH]]
! [[MMIO registers#HTIME|HTIMEL]]<br/>[[MMIO registers#HTIME|HTIMEH]]
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| W16
| W16
| V counter target for timer IRQ.
| V counter target for timer IRQ.
|-
! [[DMA registers#MDMAEN|MDMAEN]]
! $420B
| style="text-align: right" | <tt style="white-space: nowrap">7654 3210</tt>
| W8
| DMA enable.
|-
! [[DMA registers#HDMAEN|HDMAEN]]
! $420C
| style="text-align: right" | <tt style="white-space: nowrap">7654 3210</tt>
| W8
| HDMA enable.
|-
|-
! [[MMIO registers#MEMSEL|MEMSEL]]
! [[MMIO registers#MEMSEL|MEMSEL]]
! $420D
! $420D
| style="text-align: right" | <tt style="white-space: nowrap">F... ....</tt>
| style="text-align: right" | <tt style="white-space: nowrap">.... ...F</tt>
| W8
| W8
| FastROM enable (F).
| FastROM enable (F).
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| style="text-align: right" | <tt style="white-space: nowrap">VH.. ...J</tt>
| style="text-align: right" | <tt style="white-space: nowrap">VH.. ...J</tt>
| R8
| R8
| Vblank flag (V), Hblank flag (H), Joypad auto-read in-progress flag (J).
| Vblank flag (V), hblank flag (H), joypad auto-read in-progress flag (J).
|-
|-
! [[MMIO registers#RDIO|RDIO]]
! [[MMIO registers#RDIO|RDIO]]
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| style="text-align: right" | <tt style="white-space: nowrap">21DD DDDD</tt>
| style="text-align: right" | <tt style="white-space: nowrap">21DD DDDD</tt>
| R8
| R8
| Joypad port 2 I/O (2), Joypad port 1 I/O (1), Unused I/O (D).
| Joypad port 2 I/O (2), joypad port 1 I/O (1), unused I/O (D).
|-
|-
! [[MMIO registers#RDDIV|RDDIVL]]<br/>[[MMIO registers#RDDIV|RDDIVH]]
! [[MMIO registers#RDDIV|RDDIVL]]<br/>[[MMIO registers#RDDIV|RDDIVH]]
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| R16
| R16
| 16-bit joypad auto-read result (first read high to last read low).
| 16-bit joypad auto-read result (first read high to last read low).
|-


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Latest revision as of 09:46, 2 October 2022

See: MMIO register table

Name Address Bits Type Notes
APUIO0
APUIO1
APUIO2
APUIO3 		$2140
$2141
$2142
$2143 		DDDD DDDD RW8 Data to/from APU.
WMDATA $2180 DDDD DDDD RW8 Data to/from S-WRAM, increments WMADD.
WMADDL
WMADDM
WMADDH 		$2181
$2182
$2183 		LLLL LLLL
MMMM MMMM
.... ...H 		W24 S-WRAM address for WMDATA access.
JOYOUT $4016 .... ...D W8 Output to joypads (latches standard controllers).
JOYSER0 $4016 .... ..DD R8 Input from joypad 1.
JOYSER1 $4017 ...1 11DD R8 Always 1 (1), input from joypad 2 (D).
NMITIMEN $4200 N.VH ...J W8 Vblank NMI enable (N), timer IRQ mode (VH), joypad auto-read enable (J).
WRIO $4201 21DD DDDD W8 Joypad port 2 I/O (2), joypad port 1 I/O (1), unused I/O (D).
WRMPYA $4202 DDDD DDDD W8 Unsigned multiplication factor A.
WRMPYB $4203 DDDD DDDD W8 Unsigned multiplication factor B, starts 8-cycle multiplication.
WRDIVL
WRDIVH 		$4204
$4205 		LLLL LLLL
HHHH HHHH 		W16 Unsigned dividend.
WRDIVB $4206 DDDD DDDD W8 Unsigned divisor, starts 16-cycle division.
HTIMEL
HTIMEH 		$4207
$4208 		.... ...H
LLLL LLLL 		W16 H counter target for timer IRQ.
VTIMEL
VTIMEH 		$4209
$420A 		.... ...H
LLLL LLLL 		W16 V counter target for timer IRQ.
MDMAEN $420B 7654 3210 W8 DMA enable.
HDMAEN $420C 7654 3210 W8 HDMA enable.
MEMSEL $420D .... ...F W8 FastROM enable (F).
RDNMI $4210 N... VVVV R8 Vblank NMI flag (N), CPU version (V).
TIMEUP $4211 T... .... R8 Timer IRQ flag (T).
HVBJOY $4212 VH.. ...J R8 Vblank flag (V), hblank flag (H), joypad auto-read in-progress flag (J).
RDIO $4213 21DD DDDD R8 Joypad port 2 I/O (2), joypad port 1 I/O (1), unused I/O (D).
RDDIVL
RDDIVH 		$4214
$4215 		LLLL LLLL
HHHH HHHH 		R16 Unsigned quotient.
RDMPYL
RDMPYH 		$4216
$4217 		LLLL LLLL
HHHH HHHH 		R16 Unsigned product or unsigned remainder.
JOY1L
JOY1H
JOY2L
JOY2H
JOY3L
JOY3H
JOY4L
JOY4H
 $4218
$4219
$421A
$421B
$421C
$421D
$421E
$421F 		LLLL LLLL
HHHH HHHH 		R16 16-bit joypad auto-read result (first read high to last read low).
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