SPC-700 instruction set: Difference between revisions
From SNESdev Wiki
Jump to navigationJump to search
Rainwarrior (talk | contribs) m (Rainwarrior moved page SPC-700 Instruction Set to SPC-700 instruction set: capitalization) |
Rainwarrior (talk | contribs) (registers and addressing modes summary) |
||
| Line 1: | Line 1: | ||
The Sony SPC-700 CPU is part of the [[S-SMP]] sound processor of the SNES. It runs at 2.048 MHz, and behaves similarly to a 6502 at 1.024 MHz with some extensions. | |||
== | == Architecture == | ||
The SPC-700 has a 16-bit address space, and a similar set of registers to the 6502. | |||
=== Registers === | |||
* '''A''' - 8-bit accumulator | |||
* '''X''' - 8-bit index | |||
* '''Y''' - 8-bit index | |||
* '''YA''' - 16-bit pair of A (lsb) and Y (msb). | |||
* '''PC''' - program counter | |||
* '''SP''' - stack pointer | |||
* '''PSW''' - program status word: NVPBHIZC | |||
** '''N''' - negative flag (high bit of result was set) | |||
** '''V''' - overflow flag (signed overflow indication) | |||
** '''P''' - direct page flag (moves the direct page to $0100 if set) | |||
** '''H''' - half carry flag (carry between low and high nibble) | |||
** '''I''' - interrupt disable (unused: the S-SMP has no attached interrupts) | |||
** '''Z''' - zero flag (set if last result was zero) | |||
** '''C''' - carry flag | |||
Differences from the 6502: | |||
* A 16-bit combined YA register is available for some operations. | |||
* The direct page can be moved to $0100. (Rarely used.) | |||
* A half carry flag that is useful for nibble operations. | |||
* No decimal mode. | |||
=== Addressing Modes === | |||
* imm - 8-bit immediate value | |||
* dp - 8-bit direct page offset ($0000+dp or $01000+dp) | |||
* !abs - 16-bit absolute address | |||
* rel - relative offset in two's complement | |||
* (addr) - indirect | |||
* (addr)+i - indirect indexed (add index after lookup) | |||
* [addr+i] - indexed indirect (add index before lookup) | |||
== Instructions == | == Instructions == | ||
Revision as of 03:57, 7 October 2022
The Sony SPC-700 CPU is part of the S-SMP sound processor of the SNES. It runs at 2.048 MHz, and behaves similarly to a 6502 at 1.024 MHz with some extensions.
Architecture
The SPC-700 has a 16-bit address space, and a similar set of registers to the 6502.
Registers
- A - 8-bit accumulator
- X - 8-bit index
- Y - 8-bit index
- YA - 16-bit pair of A (lsb) and Y (msb).
- PC - program counter
- SP - stack pointer
- PSW - program status word: NVPBHIZC
- N - negative flag (high bit of result was set)
- V - overflow flag (signed overflow indication)
- P - direct page flag (moves the direct page to $0100 if set)
- H - half carry flag (carry between low and high nibble)
- I - interrupt disable (unused: the S-SMP has no attached interrupts)
- Z - zero flag (set if last result was zero)
- C - carry flag
Differences from the 6502:
- A 16-bit combined YA register is available for some operations.
- The direct page can be moved to $0100. (Rarely used.)
- A half carry flag that is useful for nibble operations.
- No decimal mode.
Addressing Modes
- imm - 8-bit immediate value
- dp - 8-bit direct page offset ($0000+dp or $01000+dp)
- !abs - 16-bit absolute address
- rel - relative offset in two's complement
- (addr) - indirect
- (addr)+i - indirect indexed (add index after lookup)
- [addr+i] - indexed indirect (add index before lookup)
Instructions
Official instruction names and syntax for SPC-700 instruction were provided by Sony. However, because of its architectural similarity to 6502, some prefer to rename and remap them using a 6502 style syntax. Both are provided here.
| Instruction | 6502-Style | Opcode | Bytes | Cycles | Flags | Notes |
|---|---|---|---|---|---|---|
| TODO | ||||||
Links
- SPC700 Reference - CPU Instruction Set at superfamicom.org wiki
