Super FX: Difference between revisions
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== References == | == References == | ||
:* [[SNES Development Manual]]: Book II 2-1-1 | :* [[SNES Development Manual]]: Book II 2-1-1 | ||
:* [https://github.com/bsnes-emu/bsnes/tree/master/bsnes/sfc/coprocessor/superfx bsnes superfx] - emulation source code | |||
:* [https://github.com/bsnes-emu/bsnes/tree/master/bsnes/processor/gsu bsnes gsu] - emulation source code | :* [https://github.com/bsnes-emu/bsnes/tree/master/bsnes/processor/gsu bsnes gsu] - emulation source code | ||
:* [https://github.com/snes9xgit/snes9x/blob/master/fxemu.cpp Snes9x fxemu] - emulation source code | :* [https://github.com/snes9xgit/snes9x/blob/master/fxemu.cpp Snes9x fxemu] - emulation source code | ||
Latest revision as of 23:56, 22 February 2023
The Super FX is an enhancement chip, or graphic support unit (GSU), designed by Argonaut Games that natively supports plotting individual pixels and lines. It has a 14 general purpose 16-bit registers, 98 instructions, and a 512-byte cache.
References
- SNES Development Manual: Book II 2-1-1
- bsnes superfx - emulation source code
- bsnes gsu - emulation source code
- Snes9x fxemu - emulation source code
- Super FX opcode matrix - superfamicom.org wiki
- Super FX acronyms - superfamicom.org wiki
- Super FX cycle times - superfamicom.org wiki
- Super FX flag clobber table - superfamicom.org wiki
