UPD6376 Pinout

Pinout of the uPD6376 Audio DAC. It takes the Digital Serial Audio data from the S-DSP (not the DSP-x coprocessor) and converts it into an Analog signal.

         .----\/----.
FSSEL -> | 01    16 | <- CLK
 DGND -- | 02    15 | <- DIN
   NC xx | 03    14 | <- LRSEL
 DVCC -- | 04    13 | <- LRCLK
 AGND -- | 05    12 | -- AGND
 ROUT <~ | 06    11 | ~> LOUT
 AVCC -- | 07    10 | <~ LREF
 AVCC -- | 08    09 | <~ RREF
         ˋ----------´

• AVCC: Analog Voltage Supply
• DVCC: Digital Volateg Supply
• AGND: Analog Ground
• DGND: Digital Ground
• LREF: Reference Volate for Left DAC
• RREF: Reference Volate for Right DAC
• DIN: Data Input
• CLK: Serial Clock
• LRCLK: Left/Right Clock
• LRSEL: Left/Right Select
• FSSEL: When Low or Floating (internally pulled low), Both Channels are inout from Pin 15 (SNES Behavior). If High, Left Channel is taken from Pin 15 and Right from Pin 14.

• Based on https://www.alldatasheet.com/html-pdf/6972/NEC/UPD6376/164/4/UPD6376.html