Super FX: Difference between revisions

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The '''Super FX''' is an enhancement chip, or graphic support unit (GSU), designed by Argonaut Games that natively supports plotting individual pixels and lines.  It has a 14 general purpose 16-bit registers, 98 instructions, and a 512-byte cache.
The '''Super FX''' is an enhancement chip, or graphic support unit ('''GSU'''), designed by Argonaut Games that natively supports plotting individual pixels and lines.  It has a 14 general purpose 16-bit registers, 98 instructions, and a 512-byte cache.


== References ==
== References ==
:* [[SNES Development Manual]]: Book II
:* [[SNES Development Manual]]: Book II 2-1-1
:* [https://github.com/bsnes-emu/bsnes/tree/master/bsnes/sfc/coprocessor/superfx bsnes superfx] - emulation source code
:* [https://github.com/bsnes-emu/bsnes/tree/master/bsnes/processor/gsu bsnes gsu] - emulation source code
:* [https://github.com/snes9xgit/snes9x/blob/master/fxemu.cpp Snes9x fxemu] - emulation source code
:* [https://wiki.superfamicom.org/super-fx-opcode-matrix Super FX opcode matrix] - superfamicom.org wiki
:* [https://wiki.superfamicom.org/superfx-acronyms Super FX acronyms] - superfamicom.org wiki
:* [https://wiki.superfamicom.org/superfx-cycle-times Super FX cycle times] - superfamicom.org wiki
:* [https://wiki.superfamicom.org/superfx-flag-clobber-table Super FX flag clobber table] - superfamicom.org wiki
 
[[Category:Expansions]]

Latest revision as of 23:56, 22 February 2023

The Super FX is an enhancement chip, or graphic support unit (GSU), designed by Argonaut Games that natively supports plotting individual pixels and lines. It has a 14 general purpose 16-bit registers, 98 instructions, and a 512-byte cache.

References