CPU vectors: Difference between revisions
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(Adds CPU vector page.) |
(Puts empty slots and ABORT into the tables.) |
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! $FFE6-FFE7 | ! $FFE6-FFE7 | ||
| BRK instruction | | BRK instruction | ||
|- | |||
! (ABORT) | |||
! $FFE8-FFE9 | |||
| (Unused on 5A22 S-CPU) | |||
|- | |- | ||
! NMI | ! NMI | ||
! $FFEA-FFEB | ! $FFEA-FFEB | ||
| [[MMIO registers#NMITIMEN|NMITIMEN]] vblank interrupt, or 5A22 /NMI input | | [[MMIO registers#NMITIMEN|NMITIMEN]] vblank interrupt, or 5A22 /NMI input | ||
|- | |||
! (none) | |||
! $FFEC-FFED | |||
| | |||
|- | |- | ||
! IRQ | ! IRQ | ||
Line 29: | Line 37: | ||
! $FFF4-FFF5 | ! $FFF4-FFF5 | ||
| COP instruction | | COP instruction | ||
|- | |||
! (none) | |||
! $FFF6-FFF7 | |||
| | |||
|- | |||
! (ABORT) | |||
! $FFF8-FFF9 | |||
| (Unused on 5A22 S-CPU) | |||
|- | |||
|- | |- | ||
! NMI | ! NMI | ||
Line 42: | Line 59: | ||
| BRK instruction, or external interrupt (5A22 /IRQ input) | | BRK instruction, or external interrupt (5A22 /IRQ input) | ||
|} | |} | ||
Revision as of 01:22, 26 May 2022
When an interrupt occurs, the address of the interrupt handler is read from the vector table in bank $00. The vector used is determined by the type of interrupt and the current CPU mode. Vectors are all 16-bit and the target bank is forced to $00.
65C816 mode vectors
Vector | Address | Examples |
---|---|---|
COP | $FFE4-FFE5 | COP instruction |
BRK | $FFE6-FFE7 | BRK instruction |
(ABORT) | $FFE8-FFE9 | (Unused on 5A22 S-CPU) |
NMI | $FFEA-FFEB | NMITIMEN vblank interrupt, or 5A22 /NMI input |
(none) | $FFEC-FFED | |
IRQ | $FFEE-FFEF | NMITIMEN H/V timer interrupt, or external interrupt (5A22 /IRQ input) |
6502 mode vectors
Vector | Address | Examples |
---|---|---|
COP | $FFF4-FFF5 | COP instruction |
(none) | $FFF6-FFF7 | |
(ABORT) | $FFF8-FFF9 | (Unused on 5A22 S-CPU) |
NMI | $FFFA-FFFB | 5A22 /NMI input |
RESET | $FFFC-FFFD | 5A22 /RESET (CPU always resets into 6502 mode) |
IRQ/BRK | $FFFE-FFFF | BRK instruction, or external interrupt (5A22 /IRQ input) |