S-SMP: Difference between revisions
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== BRR Samples == | == BRR Samples == | ||
TODO | TODO (See [[#Links|Links]] section below.) | ||
== See Also == | == See Also == |
Revision as of 05:05, 3 September 2022
The SPC700 is the CPU portion of the S-SMP processor used to run the sound and music of the SNES. It is an 8-bit CPU with capabilities similar to the 6502.
Memory Layout
TODO
Registers
TODO
DSP Registers
TODO
Instruction Set
Official instruction names and syntax for SPC-700 instruction were provided by Sony. However, because of its architectural similarity to 6502, some prefer to rename and remap them using a 6502 style syntax. Both are provided here.
Instruction | 6502-Style | Opcode | Bytes | Cycles | Flags | Notes |
---|---|---|---|---|---|---|
TODO |
IPL Boot ROM
TODO
BRR Samples
TODO (See Links section below.)
See Also
- Booting the SPC700 - Guide for setting up the SPC program after reset.
- Tools - Lists tools for building SPC700 code.
- APU pinout - Chip pinouts.
Links
- SPC 700 Documentation - Article by Gau.
- SPC700 Reference - Superfamicom.org wiki article.
- Bit Rate Reduction - Superfamicom.org wiki article, documents BRR sample format.
- SNES APU DSP BRR Samples - Fullsnes documentation of BRR sample format.