HDMA examples

Examples for using HDMA.

Transfer patterns

The following is a suggested list of PPU registers that can be used in the various HDMA transfer patterns.

One register (DMAP pattern 0)

This pattern reads/writes a single byte to a single address on the B-bus (+0).

This pattern should not be used on write-twice or read-twice registers.

• BG Mode: BGMODE
• Mosaic Settings: MOSAIC
• BG Settings: BG1SC, BG2SC, BG3SC, BG4SC, BG12NBA, BG34NBA
• Mode 7 settings: M7SEL
• CGRAM address: CGADD
  • A future HDMA channel should write to CGDATA on the same scanline as the CGADD write.
• Window settings: W12SEL, W34SEL, WOBJSEL, WBGLOG, WOBJLOG
• Layer enable: TM, TS, TMW, TSW
• Color math: CGWSEL, CGADSUB
• Screen Mode/Video Select: SETINI
• Fixed color data: COLDATA
  • Only a single B/G/R channel can be changed in this pattern (unless multiple channels contain the same value). See COLDATA for more details.

Two registers (DMAP pattern 1)

This pattern reads/writes two bytes to two addresses on the B-bus (+0, +1). It is useful when writing to two adjacent byte registers.

This pattern must not be used on write-twice or read-twice registers.

• Window 1 left and right position: WH0 & WH1
• Window 2 left and right position: WH2 & WH3
• Window mask settings: W12SEL & W34SEL, W34SEL & WOBJSEL
• Window mask logic: WBGLOG & WOBJLOG
• Layer Enable: TM & TS, TMW & TSW
• Color math settings: CGWSEL & CGADSUB

One register, write twice (DMAP pattern 2)

This pattern reads/writes two bytes to a single write-twice or read-twice register on the B-bus (+0, +0).

• BG horizontal scroll offset: BGnHOFS
• BG vertical scroll offset: BGnVOFS
• Mode 7 matrix: M7A, M7B, M7C, M7D, M7X, M7Y
• CGRAM data: CGDATA
  • Note: A previous HDMA channel should set the CGRAM address on the same scanline as a CGDATA write
• Fixed color data: COLDATA
  • Only two of the three B/G/R channels can be changed in this pattern (unless two channels share the same value). See COLDATA for more details.

Two registers, write twice (DMAP pattern 3)

This pattern reads/writes four bytes to two adjacent write-twice or read-twice registers on the B-bus (+0, +0, +1, +1).

• BG scroll offsets: BGnHOFS & BGnVOFS
• 2 adjacent mode 7 matrix values: M7A & M7B, M7C & M7D, M7X & M7Y
• CGRAM address and data: CGADD & CGDATA
  • This transfer will write two values to the CGRAM address, followed by a color word value to CGDATA.
  • The first byte will be ignored by the PPU, the second byte contains the target CGRAM address (palette index), the third and forth bytes contain the color data.

Four registers (DMAP pattern 4)

This pattern reads/writes four bytes to four addresses on the B-bus (+0, +1, +2, +3).

This pattern must not be used on write-twice or read-twice registers.

• All four window positions: WH0 & WH1 & WH2 & WH3

Links

• HDMA Examples - by nesdoug
• Grog's Guide to DMA and HDMA on the SNES - superfamicom.org wiki