User contributions for Undisbeliever

01:5201:52, 1 December 2024 diff hist +109‎ DMA examples ‎ →‎Copying OAM: Add timing to CopyOAM. Renamed OAM to oamBuffer to avoid confusion with the OAM memory in the PPU. current
01:4801:48, 1 December 2024 diff hist +38‎ DMA examples ‎ →‎Copying OAM: Fix missing OAMADD write

23:2723:27, 26 November 2024 diff hist +1,219‎ Errata ‎ Add file format errata
23:1823:18, 26 November 2024 diff hist +4‎ Version differences ‎ →‎DAC: Fix missing PAL for NEC 6376 DAC consoles current
23:1623:16, 26 November 2024 diff hist +346‎ Errata ‎ →‎S-DSP: Add NEC µPD6376 DAC audio imbalance hardware bug
23:1523:15, 26 November 2024 diff hist +30‎ Errata ‎ →‎Audio: Split audio into S-SMP and S-DSP sections
23:1123:11, 26 November 2024 diff hist −5‎ Version differences ‎ →‎DAC: Fix typo (Motherboards -> Consoles)
23:1023:10, 26 November 2024 diff hist +77‎ Errata ‎ Add link to Version_differences page
23:0823:08, 26 November 2024 diff hist +204‎ Version differences ‎ Add no way to programmatically detect 1-chip, link to errata page

23:0423:04, 18 November 2024 diff hist +4,241‎ N Version differences ‎ Started the Version differences page

22:2222:22, 15 November 2024 diff hist +20‎ Booting the SPC700 ‎ Add sound category current
22:2222:22, 15 November 2024 diff hist +20‎ S-DSP registers ‎ Add Sound category current
22:2022:20, 15 November 2024 diff hist +22‎ S-SMP ‎ →‎See Also: Add link to S-DSP_registers page current
22:1922:19, 15 November 2024 diff hist −8,619‎ S-SMP ‎ Remove DSP Registers section. It has been replaced by the S-DSP_registers page
22:1322:13, 15 November 2024 diff hist +71‎ S-SMP ‎ →‎DSPDATA - DSP register data ($F3): Replace S-DSP register addresses with names and address in (), fix link to FLG register.
22:0922:09, 15 November 2024 diff hist +1‎ S-SMP ‎ Move text from DSP Registers section to DSPDATA register
12:1212:12, 15 November 2024 diff hist +1,246‎ S-SMP ‎ Expand the SHVC-SOUND components

13:0213:02, 11 November 2024 diff hist +456‎ S-SMP ‎ →‎CONTROL - Control register ($F1, write-only): Add more note to the CONTROL register
12:3212:32, 11 November 2024 diff hist +327‎ Errata ‎ →‎Audio: Add TEST register errata
12:2412:24, 11 November 2024 diff hist 0‎ S-SMP ‎ Fix clocks per sample
12:2312:23, 11 November 2024 diff hist +6‎ S-SMP ‎ The SPC-700 clock is 1.024 MHz. Ares states 2.048 Mhz is fed to the S-SMP.
12:0812:08, 11 November 2024 diff hist +22‎ m S-SMP ‎ Add link to S-DSP registers

10:4210:42, 10 November 2024 diff hist +243‎ S-SMP ‎ Add link to S-DSP register page on DSPADDR and DSPDATA registers
10:3410:34, 10 November 2024 diff hist +4‎ Errata ‎ →‎Audio: Update the Cx FIR S-DSP registers to FIRx
10:3210:32, 10 November 2024 diff hist +68‎ S-DSP registers ‎ →‎FLG - Flags register ($6C): Add power-on and reset state to preformatted text (to match the MMIO_registers page)
10:2610:26, 10 November 2024 diff hist 0‎ APU register table/DSP global ‎ Change the 'S' signed bits to 'V'. The signed PPU registers table does not use S bits. current
10:2210:22, 10 November 2024 diff hist +40‎ APU register table/DSP global ‎ Rename the FIR S-DSP registers to FIRx (the name used in ares). Cx and FFCx look like addresses.
10:1910:19, 10 November 2024 diff hist +8‎ m S-DSP registers ‎ →‎Reading and writing S-DSP registers: Update Cx asm comments to FIRx
10:1710:17, 10 November 2024 diff hist −20‎ S-DSP registers ‎ →‎FIRx - Echo FIR filter coefficients ($xF): Rename the FIR S-DSP registers to FIRx (the name used in ares). Cx and FFCx look like addresses.

10:3410:34, 9 November 2024 diff hist +288‎ S-SMP ‎ →‎TEST - Undocumented test register ($F0, write-only): Replace the description with a bold warning
10:1710:17, 9 November 2024 diff hist 0‎ APU register table/SMP ‎ Replace "VVVV VVVV" with "DDDD DDDD" to match MMIO_register_table/MMIO table current
10:1310:13, 9 November 2024 diff hist +12‎ m S-SMP ‎ →‎DSPDATA - DSP register data ($F3): Fix missing vertical bars in register bits
10:1010:10, 9 November 2024 diff hist +1,613‎ S-SMP ‎ →‎Registers: Update section names, add anchors and add register bits to match the PPU_registers and MMIO_registers pages

10:1010:10, 8 November 2024 diff hist +4‎ APU register table/SMP ‎ Fix misaligned $F8 and $F9 registers
10:0710:07, 8 November 2024 diff hist −2,108‎ S-SMP ‎ →‎Registers: Replace S-SMP register table with APU_register_table/SMP template
10:0310:03, 8 November 2024 diff hist −4‎ APU register table/SMP ‎ Update register bits (All TEST bits are used, DSPADDR bit 7 is used, TxOUT high-nibble is always 0)
09:5709:57, 8 November 2024 diff hist +537‎ APU register table ‎ Add S-SMP register summary current
09:5109:51, 8 November 2024 diff hist +2,826‎ N APU register table/SMP ‎ Took the table from the S-SMP page, updated to match MMIO_register_table, added different register names and links

12:1312:13, 5 November 2024 diff hist +368‎ S-DSP registers ‎ →‎VxSRCN - Voice sample source ($x4): Document VxSRCN
12:0312:03, 5 November 2024 diff hist +54‎ S-DSP registers ‎ →‎VxADSR1, VxADSR2 - ADSR enable and settings ($x5, $x6): Document no sustain decay when SR=0
12:0212:02, 5 November 2024 diff hist +127‎ S-DSP registers ‎ →‎VxADSR1, VxADSR2 - ADSR enable and settings ($x5, $x6): Add missing Sustain Level documentation
11:4711:47, 5 November 2024 diff hist +448‎ S-DSP registers ‎ →‎VxPITCHL, VxPITCHH - Voice pitch ($x2, $x3): Copy pitch documentation from the S-SMP page
11:4411:44, 5 November 2024 diff hist +490‎ S-DSP registers ‎ →‎VxPITCHL, VxPITCHH - Voice pitch ($x2, $x3): Add brief description and formulas for calculating VxPITCH values

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