WRAM pinout
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Pinout
____________________
| |
+5V -- | 01 . 64 | -- GND
CPU D4 <> | 02 63 | <> CPU D3
CPU D5 <> | 03 62 | <> CPU D2
CPU D6 <> | 04 61 | <> CPU D1
CPU D7 <> | 05 60 | <> CPU D0
SYSTEM CLK -> | 06 59 | <- CPU /WR
REFRESH -> | 07 58 | <- /PWR
/RESET -> | 08 57 | <- CPU /RD
NC -- | 09 56 | <- /PRD
CS1 -> | 10 55 | ?? G
CS2 -> | 11 54 | <- PA1
CS3 -> | 12 53 | <- PA0
/CS1 (GND) -> | 13 52 | <- PS3 (PA7)
/CS2 (GND) -> | 14 51 | <- PS2 (+5V)
/CS3 -> | 15 Nintendo 50 | <- PS1 (+5V) Orientation:
+5V -- | 16 S-WRAM 49 | -- +5V --------------------
GND -- | 17 48 | -- GND 64 33
NC -- | 18 47 | <- /PS5 | |
NC -- | 19 46 | <- /PS4 .-----------.
NC -- | 20 45 | <- /PS3 | Nintendo |
NC -- | 21 44 | <- /PS2 | S-WRAM O|
NC -- | 22 43 | <- /PS1 |. |
CPU A0 -> | 23 42 | <- ENABLE '-----------'
CPU A9 -> | 24 41 | <- CPU A8 | |
CPU A1 -> | 25 40 | <- CPU A16 01 32
CPU A10 -> | 26 39 | <- CPU A7
CPU A2 -> | 27 38 | <- CPU A15 Legend:
CPU A11 -> | 28 37 | <- CPU A6 ----------------------------
CPU A3 -> | 29 36 | <- CPU A14 --[S-WRAM]-- Power, n/a
CPU A12 -> | 30 O 35 | <- CPU A5 ->[S-WRAM]<- S-WRAM input
CPU A4 -> | 31 34 | <- CPU A13 <-[S-WRAM]-> S-WRAM output
+5V -- | 32 33 | -- GND <>[S-WRAM]<> Bidirectional
|____________________| ??[S-WRAM]?? Unknown
Signal descriptions
- PS3, /PS5..1: These are peripheral bus enables and are connected to PA7..2 to map S-WRAM to $80-83.
