S-SMP
The SPC700 is the CPU portion of the S-SMP processor used to run the sound and music of the SNES. It is an 8-bit CPU with capabilities similar to the 6502.
Memory Layout
TODO
Registers
TODO
DSP Registers
A DSP register can be selected with $F2, after which it can be read or written via $FE. Often it is useful to load the register address into A, and the value to send in Y, so that MOV $F2, AY can be used to do both in one 16-bit instruction.
Voices
There are 8 voices, numbered 0 to 7. Each voice X has 10 registers in the range $X0-$X9.
| Name | Address | Bits | Notes |
|---|---|---|---|
| VOL (L) | $X0 | SVVV VVVV | Left channel volume, signed. |
| VOL (R) | $X1 | SVVV VVVV | Right channel volume, signed. |
| P (L) | $X2 | LLLL LLLL | Low 8 bits of sample pitch. |
| P (H) | $X3 | xxHH HHHH | High 6 bits of sample pitch. |
| SCRN | $X4 | SSSS SSSS | Selects a sample source entry from the directory (see DIR below). |
| ADSR (1) | $X5 | EDDD AAAA | ADRS enable (E), decay rate (D), attack rate (A). |
| ADSR (2) | $X6 | LLLR RRRR | Sustain level (L), sustain rate (R). |
| GAIN | $X7 | 0VVV VVVV 1MMV VVVV |
Mode (M), value (V). |
| ENVX | $X8 | 0VVV VVVV | Reads current 7-bit value of ADSR/GAIN envelope. |
| OUTX | $X9 | SVVV VVVV | Reads signed 8-bit value of current sample wave multiplied by ENVX, before applying VOL. |
ADSR
This controls an Attack-Decay-Sustain-Release envelope that automatically adjusts the sample's envelope volume (ENVX) over time.
- E: 1 to enable ADSR envelope, otherwise uses GAIN directly.
- A: Attack speed. $F for instant.
- D: Decay speed, time to decay from full volume to the sustain level after the initial attack.
- L: Sustain level.
- R: Sustain release, speed of decay to 0 after note off.
GAIN
This register has 5 modes:
- 0VVV VVVV sets ENVX directly.
- 110V VVVV Linear slide up to 100% volume with rate V.
- 111V VVVV Bent-line (fast to 75%, then slower to 100%) slide up with rate V.
- 100V VVVV Linear slide down to 0% volume with rate V.
- 101V VVVV Exponential slide down to 0% volume with rate V.
Global
Instruction Set
Official instruction names and syntax for SPC-700 instruction were provided by Sony. However, because of its architectural similarity to 6502, some prefer to rename and remap them using a 6502 style syntax. Both are provided here.
| Instruction | 6502-Style | Opcode | Bytes | Cycles | Flags | Notes |
|---|---|---|---|---|---|---|
| TODO | ||||||
IPL Boot ROM
TODO
BRR Samples
TODO (See Links section below.)
See Also
- Booting the SPC700 - Guide for setting up the SPC program after reset.
- Tools - Lists tools for building SPC700 code.
- APU pinout - Chip pinouts.
Links
- SPC 700 Documentation - Article by Gau.
- SPC700 Reference - Superfamicom.org wiki article.
- Bit Rate Reduction - Superfamicom.org wiki article, documents BRR sample format.
- SNES APU DSP BRR Samples - Fullsnes documentation of BRR sample format.
